Performance analysis of nonvolatile gate-all-around charge-trapping TAHOS memory cells

Author

Gnani, E. ; Gnudi, A. ; Reggiani, S. ; Baccarani, G. ; Fu, J. ; Singh, N. ; Lo, G.Q. ; Kwong, D.L.

Author_Institution

ARCES, Univ. of Bologna, Bologna, Italy

fYear

2009

fDate

9-11 Dec. 2009

Firstpage

1

Lastpage

2

Abstract

In this work we present an investigation on the program, erase and retention properties of TaN/Al₂O₃/HfO₂/SiO₂/Si (TAHOS) nonvolatile (NV) memory cells fabricated on an advanced gate-all-around (GAA) architecture. The influence of several device parameters on the above characteristics is quantitatively assessed by numerical simulation, using an in-house developed simulation code suitable for both planar and cylindrical geometries.

Keywords

alumina; electron traps; hafnium compounds; numerical analysis; random-access storage; silicon; silicon compounds; tantalum compounds; TAHOS nonvolatile memory cells; TaN-Al₂O₃-HfO₂-SiO₂-Si; cylindrical geometry; gate-all-around architecture; in-house developed simulation code; nonvolatile gate-all-around charge-trapping; numerical simulation; planar geometry; Charge carrier processes; Educational institutions; Electron traps; Energy states; Geometry; Hafnium oxide; Microelectronics; Nonvolatile memory; Performance analysis; Poisson equations;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Device Research Symposium, 2009. ISDRS '09. International

Conference_Location

College Park, MD

Print_ISBN

978-1-4244-6030-4

Electronic_ISBN

978-1-4244-6031-1

Type

conf

DOI

10.1109/ISDRS.2009.5378209

Filename

5378209