DocumentCode
3058520
Title
Redesign modern IP router chips in a 3D technology
Author
Bo Yu ; Suoming Pu
Author_Institution
China Design Center, IBM Microelectron., Beijing, China
fYear
2012
fDate
2-5 Dec. 2012
Firstpage
559
Lastpage
562
Abstract
The paper discusses the 3D integration of router chips and proposes a 3D architecture of router system. We analyze the bottlenecks of modern router, the advantages of 3D stack and show the potential benefit of applying 3D stack on router chips. By careful architecture level and circuit level optimization, we indicate the router system can be improved greatly with 3D technologies. The key contribution of the paper is to provide a reference for network hardware designer in future works.
Keywords
application specific integrated circuits; logic design; three-dimensional integrated circuits; 3D architecture; 3D integration; 3D stack; 3D technology; architecture level; circuit level optimization; modern IP router chips; network hardware designer; router system; Computer architecture; Engines; Fabrics; Integrated circuit interconnections; Optical switches; Random access memory; 3D Stack; Forward Engine; Router; eDRAM;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location
Kaohsiung
Print_ISBN
978-1-4577-1728-4
Type
conf
DOI
10.1109/APCCAS.2012.6419096
Filename
6419096
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