Title :
A 2.7 V CMOS IF transceiver for PHS application
Author :
Yin, Guang-Ming ; Ahmed, Kashif ; Danny Shamiou ; Jorge Griio ; Law, Sam ; Wong, Ceasar ; Paulino, Nuno
Author_Institution :
Semicond. Syst., Rockwell Int. Corp., Newport Beach, CA, USA
Abstract :
This paper describes a single chip 2.7 V 248.5 MHz IF transceiver including VCO, PLL and a complete voice codec for personal handy phone system (PHS). The IC is implemented in a 0.6-μm CMOS process. It achieves a receive sensitivity of -86 dBV, 1 dB compression point of -9 dBV and 32 dB image rejection. This circuit consumes 24 mA in the receive mode, 26 mA in the transmit mode, and 4.5 mA in the voice codec
Keywords :
CMOS analogue integrated circuits; frequency synthesizers; intermediate-frequency amplifiers; personal communication networks; phase locked loops; transceivers; vocoders; voltage-controlled oscillators; 0.6 micron; 2.7 V; 24 mA; 248.5 MHz; 26 mA; 4.5 mA; ADC; CMOS IF transceiver; DAC; IF amplifier; IF gain stages; PHS application; PLL; VHF VCO; complete voice codec; frequency synthesizer; image-reject down-convertor; receive sensitivity; single chip; single-side-band upconvertor; CMOS process; CMOS technology; Circuits; Codecs; Phase frequency detector; Phase locked loops; RF signals; Radio frequency; Transceivers; Voltage-controlled oscillators;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-4306-9
DOI :
10.1109/ICSICT.1998.785895
