DocumentCode
306440
Title
A digital processor for neural networks
Author
Saeks, R. ; Pridd, K. ; Donovan, D. ; Mathia, K. ; Colbert, B.
Author_Institution
Accurate Autom. Corp., Chattanooga, TN, USA
Volume
2
fYear
1996
fDate
14-17 Oct 1996
Firstpage
1345
Abstract
A special purpose digital processor which is optimized for neural network applications is described. The design is built around a small number of native instructions, each of which correspond to a high level neural network construct, thereby facilitating a highly pipelined processor implementation while simultaneously minimizing the number of instructions required to realize a given network. The neural network processor (NNP(R)) has been implemented for use in both PC/ISA and VME systems and is supported by a full suite of development software
Keywords
microcomputer applications; neural chips; neural net architecture; pipeline processing; PC/ISA system; VME system; arithmetic instruction; digital processor; native instructions; neural network architecture; pipelined processor; Biological neural networks; Biological system modeling; Biology computing; Buffer storage; Clocks; Computer architecture; Neural networks; Neurons; Signal processing algorithms; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man, and Cybernetics, 1996., IEEE International Conference on
Conference_Location
Beijing
ISSN
1062-922X
Print_ISBN
0-7803-3280-6
Type
conf
DOI
10.1109/ICSMC.1996.571306
Filename
571306
Link To Document