DocumentCode
3064967
Title
Integrated services fast packet switching
Author
Jiang, Xi ; Meditch, James S.
Author_Institution
AT&T Bell Labs., Holmdel, NJ, USA
fYear
1989
fDate
27-30 Nov 1989
Firstpage
1478
Abstract
The architecture of a FP (fast packet) switch for integrated voice-data-video services is described. The switch employs autonomous processing units with local memory to store switching information and is built around a bit-parallel banyan MIN (multistage interconnection networks). The bit-parallel banyan MIN is used to minimize delay in executing all switching functions which are required for integrated services. A group switching protocol for video traffic is proposed in order to satisfy video delay constraints, and analytic models are developed to determine the switch´s performance characteristics. It is shown that the switch readily achieves low delay and small blocking-and-loss probability for video traffic while still being able to utilize the remaining system bandwidth to serve voice and data traffic. It is concluded that the FP switch is a flexible and efficient architecture for integrated voice-data-video services switching systems
Keywords
ISDN; multiprocessor interconnection networks; packet switching; probability; protocols; telecommunication traffic; ISDN; autonomous processing units; bit-parallel banyan MIN; blocking-and-loss probability; fast packet switching; group switching protocol; integrated voice-data-video services; low delay; multistage interconnection networks; video traffic; Bandwidth; Delay; Intserv networks; Multiprocessor interconnection networks; Packet switching; Performance analysis; Protocols; Switches; Telecommunication traffic; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Global Telecommunications Conference and Exhibition 'Communications Technology for the 1990s and Beyond' (GLOBECOM), 1989. IEEE
Conference_Location
Dallas, TX
Type
conf
DOI
10.1109/GLOCOM.1989.64194
Filename
64194
Link To Document