DocumentCode :
3065636
Title :
Maximizing speedup through performance prediction for distributed shared memory systems
Author :
Zhuang, Yi-Chang ; Shieh, Ce-Kuen ; Liang, Tyng-Yue ; Chou, Chih-Hui
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fYear :
2001
fDate :
36982
Firstpage :
723
Lastpage :
726
Abstract :
Parallel applications executing on large-sized parallel systems achieve better speedup than on small-sized systems. However, because of the design and implementation of the distributed shared memory (DSM) system, there are some instances where large system size gives no further performance improvement over small system size. It is important to determine what system size will result in the maximum speedup while all kinds of applications are running on DSM systems. In this paper, we describe the design and implementation of the performance prediction mechanism in our DSM system, Proteus, which supports node reconfiguration to adjust the system size at run time. We adopt a simple computation model and combine it with run-time information to predict the performance under different system sizes. With this mechanism, it is possible to provide timely prediction results to adjust the size of the underlying system and thus maximize speedup
Keywords :
distributed shared memory systems; performance evaluation; reconfigurable architectures; Proteus; distributed shared memory systems; node reconfiguration; parallel applications; parallel systems; performance prediction; run-time information; speedup maximization; system size adjustment; Application software; Concurrent computing; Load management; Multithreading; Parallel processing; Predictive models; Protocols; Runtime; Scalability; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Distributed Computing Systems, 2001. 21st International Conference on.
Conference_Location :
Mesa, AZ
Print_ISBN :
0-7695-1077-9
Type :
conf
DOI :
10.1109/ICDSC.2001.919009
Filename :
919009
Link To Document :
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