A versatile, efficient digital filter for decimation and interpolation

Author

Brandt, B.P. ; Wooley, B.A.

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

1993

fDate

19-21 May 1993

Firstpage

79

Lastpage

80

Abstract

The area and power consumption of oversampled data converters are governed largely by the associated digital decimation and interpolation filters. This paper presents an area- and power-efficient programmable digital filter for decimation and interpolation in digital-audio applications. Several architectural and implementation features reduce the complexity of the filter and allow its implementation in a die area of only 3670 mils/sup 2/ (2.37 mm/sup 2/). The filter is first described in the context of decimation for an oversampled A/D converter employing a second-order sigma-delta modulator. Extensions of the filter to accommodate other modulators, as well as to perform interpolation for oversampled D/A conversion, are then discussed.

Keywords

CMOS integrated circuits; VLSI; analogue-digital conversion; convertors; delta modulation; digital filters; encoding; random-access storage; area; area-efficient programmable digital filter; decimation; die area; digital decimation; digital-audio applications; interpolation; interpolation filters; oversampled A/D converter; oversampled D/A conversion; oversampled data converters; power consumption; power-efficient programmable digital filter; second-order sigma-delta modulator; versatile efficient digital filter; CMOS integrated circuits, memory; Coding/decoding; Converters; FIR digital filters; Random-access memories; Sigma-delta modulation; Very-large-scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1993. Digest of Technical Papers. 1993 Symposium on

Conference_Location

Kyoto, Japan

Type

conf

DOI

10.1109/VLSIC.1993.920546

Filename

920546