DocumentCode
3073774
Title
Experimental verification of minimum overlap size design in a FDE-based chromatic dispersion compensation circuit with a 50Gb/s PM-QPSK signal
Author
Ogasahara, Daisaku ; Fujisawa, Shinsuke ; Takamichi, Toru ; Fukuchi, Kiyoshi
Author_Institution
Syst. Platform Res. Labs., NEC Corp., Kawasaki, Japan
fYear
2012
fDate
2-6 July 2012
Firstpage
43
Lastpage
44
Abstract
We propose a simple design method of minimum overlap data size for overlap-FDE based CD compensation. We confirmed its validity using a real-time DSP circuit and 50.7Gbps PM-QPSK signal for up to 56,200ps/nm.
Keywords
compensation; digital signal processing chips; equalisers; optical design techniques; optical fibre communication; optical fibre dispersion; optical modulation; quadrature phase shift keying; CD; FDE; PM-QPSK signal; bit rate 50.7 Gbit/s; chromatic dispersion; chromatic dispersion compensation; frequency domain equalization; minimum overlap size design; quadrature phase shift keying; real-time DSP circuit; Optical distortion; Optical fibers; Optical noise; Optical polarization; Optical receivers; Optical transmitters; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Opto-Electronics and Communications Conference (OECC), 2012 17th
Conference_Location
Busan
ISSN
2166-8884
Print_ISBN
978-1-4673-0976-9
Electronic_ISBN
2166-8884
Type
conf
DOI
10.1109/OECC.2012.6276094
Filename
6276094
Link To Document