DocumentCode
3076798
Title
A 5.75 b 350 M sample/s or 6.75 b 150 M sample/s reconfigurable flash ADC for a PRML read channel
Author
Setty, P. ; Barner, Jeff ; Plany, J. ; Burger, H. ; Sonntag, J.
Author_Institution
Lucent Technol., AT&T Bells Labs., Santa Clara, CA, USA
fYear
1998
fDate
5-7 Feb. 1998
Firstpage
148
Lastpage
149
Abstract
A reconfigurable flash analog-to-digital converter (ADC), is suited for use in a partial response maximum likelihood (PRML) read channel with digital servo. A 5V version is integrated in a read channel with digital servo using BiCMOS technology.
Keywords
analogue-digital conversion; 5 V; 5.75 bit; 6.75 bit; BiCMOS technology; PRML read channel; digital servo; partial response maximum likelihood; reconfigurable flash ADC; Clocks; Latches; Power dissipation; Samarium; Solid state circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-4344-1
Type
conf
DOI
10.1109/ISSCC.1998.672411
Filename
672411
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