DocumentCode
3078352
Title
[Title page]
Author
Lukasiewycz, Martin ; Chakraborty, Shiladri ; Milbredt, Paul
Author_Institution
Tech. Univ. Munich, Munich, Germany
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
1
Abstract
The following topics are dealt with: system-level techniques to handle performance, reliability and thermal issue; modeling and simulation of interconnects; transient faults and soft errors; networked embedded system; multi-core architecture; formal verification engine; predicting bugs generating test; digital baseband processing; three-dimensional IC; QoS guaranteed NoCs; and ultra low power smart devices.
Keywords
electronic design automation; formal verification; logic design; low-power electronics; microprocessor chips; multiprocessing systems; network-on-chip; three-dimensional integrated circuits; NoC; QoS; digital baseband processing; formal verification engine; multicore processor; networked embedded system; soft error; system-level technique; three-dimensional IC; transient fault; ultra low power smart devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763003
Filename
5763003
Link To Document