Title :
Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation
Author :
Alorda, B. ; Torrens, G. ; Bota, S. ; Segura, J.
Author_Institution :
Phys. Dept., Ules Balears Univ., Palma de Mallorca, Spain
Abstract :
SRAM cell stability analysis is typically based on Static Noise Margin (SNM) evaluation when in hold mode, although memory errors may also occur during read operations. Given that SNM varies with each cell operation, a thorough analysis of SNM in read mode is required. In this paper we investigate the SNM of OAM cells during write operations. The Word-Line Voltage modulation is proposed as an alternative to improve cell stability when in this mode. We show that it is possible to improve 8T OAM cells stability during write operations while reducing current leakage, as opposed to present methods that improve cell stability at the cost of leakage increase.
Keywords :
SRAM chips; circuit noise; circuit optimisation; circuit stability; leakage currents; write-once storage; OAM cell; SNM evaluation; SRAM cell stability analysis; cell operation; current leakage; embedded 8T SRAM; memory error; read operation; stability optimization; static noise margin; word-line voltage modulation; write operation; Circuit stability; Computer architecture; Energy consumption; Microprocessors; Random access memory; Stability analysis; Transistors;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location :
Grenoble
Print_ISBN :
978-1-61284-208-0
DOI :
10.1109/DATE.2011.5763160
