Title :
Experimental validation of the hardware implementation of a novel true random binary sequence generator for keystream applications
Author :
Guinee, R.A. ; Blaszczyk, M.
Author_Institution :
Dept. of Electron. Eng., Cork Inst. of Technol., Cork, Ireland
Abstract :
In this paper the experimental validation of a novel, modified double scroll chaotic attractor circuit, employed as a true random binary generator (TRBG) for cryptographic applications is presented. The double scroll attractor is modeled on Chua´s circuit for nonlinear operation leading to chaotic behavior. The output from the chaotic circuit which is a partially correlated binary sequence is scrambled with a cascaded series of lengthened pseudo random binary sequence generators (PRBSG) to eliminate binary digit inter dependency for decorrelation purposes. This approach results in a successful modified generator as a true random binary source for key stream generation. The modified chaotic circuit was first modeled in PSpice software to gauge its potential as an AES cryptographic module via statistical testing. The stochastic attributes of the modified generator, obtained through PSpice modelling and simulation and its post hardware implementation, using the PRBSG de-correlator were successfully tested by the well known NIST and Diehard Test Suites for statistical validation. A physical TRBG has been constructed on the basis of the proposed PRBSG modification with all statistical tests successfully passed confirming theoretical expectations which admits to its adequacy for deployment an AES module.
Keywords :
Chua´s circuit; binary sequences; chaos; cryptography; random number generation; random sequences; statistical testing; stochastic processes; AES module; Chua´s circuit; Diehard Test Suites; NIST; PSpice software; cryptographic module; double scroll chaotic attractor circuit; hardware implementation; key stream generation; nonlinear operation; pseudo random binary sequence generators; statistical tests; stochastic attributes; true random binary sequence generator; Binary sequences; Chaos; Circuit simulation; Circuit testing; Cryptography; Decorrelation; Hardware; NIST; Statistical analysis; Stochastic processes;
Conference_Titel :
Military Communications Conference, 2009. MILCOM 2009. IEEE
Conference_Location :
Boston, MA
Print_ISBN :
978-1-4244-5238-5
Electronic_ISBN :
978-1-4244-5239-2
DOI :
10.1109/MILCOM.2009.5379810