DocumentCode
3082572
Title
Built-in generation of functional broadside tests
Author
Pomeranz, Irith
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
6
Abstract
Functional broadside tests are two-pattern scan-based tests that avoid overtesting by ensuring that a circuit traverses only reachable states during the functional clock cycles of a test. On-chip test generation has the added advantage that it reduces test data volume and facilitates at-speed test application. This paper shows that on-chip generation of functional broadside tests can be done using simple hardware, and can achieve high transition fault coverage for testable circuits. With the proposed on-chip test generation method, the circuit is used for generating reachable states during test application. This alleviates the need to compute reachable states off-line.
Keywords
automatic test pattern generation; built-in self test; circuit testing; built-in generation; functional broadside testing; functional clock cycle; on-chip test generation; testable circuit; transition fault coverage; two-pattern scan-based testing; Circuit faults; Clocks; Hardware; Logic gates; Software; Synchronization; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763208
Filename
5763208
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