DocumentCode
3084192
Title
A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs
Author
Apostolakis, A. ; Psarakis, M. ; Gizopoulos, D. ; Paschalis, A.
Author_Institution
Univ. of Piraeus, Piraeus
fYear
2007
fDate
8-11 July 2007
Firstpage
271
Lastpage
276
Abstract
Functional Software-Based Self-Testing (SBST) of microprocessors and processor-based testing of Systems-on- Chip (SoCs) have recently attracted the attention of test technology research community because they provide an effective alternative to other traditional testing and self- testing approaches. SBST allows at-speed functional testing of SoC cores with virtually no circuit overhead and limited dependence on external testers. Despite the importance of peripheral control cores in SoCs (in terms of functionality and size), the applicability and limits of SBST on them have not been comprehensively studied. In this paper, we study the effectiveness of SBST on a broad class of communication peripherals. A systematic application of SBST on two popular peripheral cores (UART and Ethernet) demonstrates the effectiveness of SBST on SoCs with such cores.
Keywords
automatic testing; data communication equipment; peripheral interfaces; system-on-chip; Ethernet; UART; functional self-test approach; peripheral cores; processor-based SoC; software-based self-testing; systems-on-chip; Automatic testing; Built-in self-test; Circuit testing; Degradation; Hardware; Informatics; Manufacturing; Observability; Software testing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2007. IOLTS 07. 13th IEEE International
Conference_Location
Crete
Print_ISBN
0-7695-2918-6
Type
conf
DOI
10.1109/IOLTS.2007.7
Filename
4274866
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