A mechanism of stress-induced metal void in narrow aluminum-based metallization with the HDP CVD oxide dielectric

In 0.25 μm design-rule devices, notch-shaped micro-voids were observed in metal lines where high density plasma (HDP) chemical vapor deposition (CVD) oxide was used as an inter-metal dielectric (IMD) material. In this study, we have investigated the process conditions related to the metal voiding. When the HDP CVD oxide deposition temperature decreased, the void formations were reduced but still occurred at narrower metal lines with 0.64 and 0.75 μm pitches. In the case where TiN was used instead of Ti in the glue layer and Al capping layer, metal voids were not observed. This result suggests that the tensile stress induced by the reaction between Ti and Al at high temperature during HDP CVD oxide deposition is the major driving force for metal void formation. At high temperature, easy diffusion accelerates the formation of metal voids. Heat treatment at 450°C for 30 min after metal patterning, which produces the Ti-Al reaction before deposition of the HDP CVD oxide, is proposed as the metal void prevention method