A high Q on-chip Cu inductor post process for Si integrated circuits

Author

Rogers, John ; Tan, Liang ; Smy, Tom ; Tait, Niall ; Tarr, Garry

Author_Institution

Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada

fYear

1999

fDate

1999

Firstpage

239

Lastpage

241

Abstract

A technique has been developed to add high Q inductors to conventional silicon integrated circuits as a post processing step. The inductors are formed by copper plating over a low k dielectric layer of polyimide. An electroless copper deposition technique is used with a plating guide providing a simple method of producing high quality patterned metal. Inductors with a peak Q as high as 17 at a frequency of 2 GHz have been fabricated

Keywords

Q-factor; UHF integrated circuits; copper; dielectric thin films; electroless deposition; inductors; integrated circuit metallisation; permittivity; polymer films; 2 GHz; Cu; Si; Si integrated circuits; copper plating; electroless copper deposition technique; high Q inductors; high Q on-chip Cu inductor post process; inductor peak Q; inductors; low k dielectric layer; patterned metal; plating guide; polyimide low-k dielectric; post processing step; silicon integrated circuits; Aluminum; Artificial intelligence; Conductivity; Copper; Dielectric substrates; Etching; Inductors; Integrated circuit interconnections; Polyimides; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology, 1999. IEEE International Conference

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-5174-6

Type

conf

DOI

10.1109/IITC.1999.787132

Filename

787132