DocumentCode
3086701
Title
Embedded FLOTOX flash on ultra-low power 55nm logic DDC platform
Author
Hori, Muneo ; Fujita, Kinya ; Yasuda, Makoto ; Ookoshi, K. ; Tsutsumi, M. ; Ogawa, Hiroyo ; Takahashi, Masaharu ; Ema, T.
Author_Institution
Fujitsu Semicond. Ltd., Kuwana, Japan
fYear
2013
fDate
9-11 Dec. 2013
Abstract
We have successfully embedded flash memory on an ultra-low power (<;0.9V) 55nm Deeply Depleted Channel™ (DDC) platform. In spite of reduced thermal budget of DDC process, single-bit charge loss (SBCL) of flash after cycling can be optimized and is comparable to that of baseline embedded flash. We have also verified that improved variability and resultant ultra-low power digital performance of the DDC process is maintained in an embedded flash flow.
Keywords
flash memories; low-power electronics; baseline embedded flash; deeply depleted channel platform; embedded FLOTOX flash; embedded flash memory; single bit charge loss; size 55 nm; thermal budget; ultra low power logic DDC platform; Computer architecture; Flash memories; Implants; Low-power electronics; Microprocessors; Performance evaluation; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2013 IEEE International
Conference_Location
Washington, DC
Type
conf
DOI
10.1109/IEDM.2013.6724596
Filename
6724596
Link To Document