Scaled p-channel Ge FinFET with optimized gate stack and record performance integrated on 300mm Si wafers

We demonstrate scaled, replacement gate high-k/metal gate p-channel Ge FinFETs integrated onto 300mm Si wafers for which the best device shows record peak g_{m, ext}=2.7mS/μm (g_{m, int}=3.3mS/μm), Q (≡g_{m, ext}/SS_sat) = 32.4 and I_on= 497μA/μm at I_off = 100nA/μm, all at V_ds= -0.5V. The high performance is a result of successful integration of <;110> oriented, highly scaled Ge fins on silicon substrates and of a low D_it gate stack with capacitance equivalent thickness=8Å. This optimized gate stack supports the highest hole mobility ever reported at sub-10Å CET. Furthermore, Ge FinFETs in the present work outperform any other reported Ge devices by more than ~2.5× (g_m/SS metric) and ~2× (I_on/I_off metric) at shortest gate lengths (down to 20nm) to the best of our knowledge.