Relative figures of merit for potential chip-to-MCM substrate interconnection methods for CMOS and ECL multichip packaging

Results of a comparative study of the performance of 45 simultaneously switching 8-mA CMOS off chip drivers per chip and of 140 emitter follower drivers per ECL (emitter coupled logic) chip in various multichip module (MCM) scenarios are reported. The analysis was made for multichip systems using 12.7-mm×12.7-mm ICs. High-density substrate technology is essential for realizing the performance levels reported. Up to twelvefold (sevenfold for ECL) improvement in performance over TAB (tape automated bonding) is possible with the flip chip technology in CMOS (ECL) systems. When the propagation delay in the critical path in the multichip system is dominated by the internal gates, the speed figure of merit approaches unity. Electrical parasitics of the chip to substrate interconnections induce undershoot in the switching signal, which reduces the noise margin. Interconnection length is a major factor in determining the performance and noise for multichip packaging. This analysis shows that the flip chip technology provides the highest multichip system