Packaging technology for the NEC ACOS System 3900

The packaging technologies adopted in the NEC ACOS System 3900 are described. A new high-density surface-mount technology was adopted to further reduce the distance between the LSI chips, based on the high-speed LSI technology and the LSI multichip packaging technology used in the supercomputer SX-3. The system uses as a processor a multichip package (MCP) which can mount up to 100 VLSIs with a maximum of 20000 gates per VLSI and 70-ps delay time per gate. To connect MCPs over the shortest distance, MCPs are mounted on both sides of single 42-layer printed wiring board (PWB). A new surface-mount zero insertion force (ZIF) connector has been developed to implement this double mounting of MCPs. This ZIF connector is a high-density surface-mount connector having 9440 contacts on one side of the pad arranged in a 2.54-mm staggered grid on the PWB surface. This makes it possible to connect the MCP and the PWB at once with high reliability. The main memory unit is described