DocumentCode
3089996
Title
A Multiprocessor System for a Small Size Soccer Robot Control System
Author
Li, Ce ; Jiang, Yang ; Wu, Zhenyu ; Watanabe, Takahiro
Author_Institution
Waseda Univ., Kitakyushu
fYear
2008
fDate
23-25 Jan. 2008
Firstpage
115
Lastpage
118
Abstract
In this paper, a new fully digitized hardware design scheme of a soccer robot controller is presented as an application of a multiprocessor system. It is designed and implemented on one-chip FPGA with two embedded Nios II processors to verify the effectiveness of our system. In the practical test, the system is dependable, and has the characteristics of fast response and high precision. It also has the advantages of smaller PCB area, less chip number and shorter development period.
Keywords
field programmable gate arrays; microprocessor chips; mobile robots; multi-robot systems; Nios II processors; digitized hardware design scheme; multiprocessor system; one-chip FPGA; soccer robot control system; Communication system control; Control systems; Field programmable gate arrays; Mobile robots; Multiprocessing systems; Robot control; Robot vision systems; Robotics and automation; System testing; Wheels; FPGA; MP; multiprocessor; soccer robot;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Design, Test and Applications, 2008. DELTA 2008. 4th IEEE International Symposium on
Conference_Location
Hong Kong
Print_ISBN
978-0-7695-3110-6
Type
conf
DOI
10.1109/DELTA.2008.103
Filename
4459522
Link To Document