A communication architecture for asynchronous pulse frequency modulated analog VLSI systems, based on 1-persistent carrier sense/multiple access

Author

Abusland, Aanen ; Nilsen, Frode ; Lande, Tor S. ; Sorosen, O.

Author_Institution

Dept. of Inf., Oslo Univ., Norway

Volume

1

fYear

1996

fDate

13-16 Oct 1996

Firstpage

29

Abstract

We present a bus-access method for interchip communication in asynchronous pulse frequency encoded analog VLSI systems. The method is based on sensing traffic on the bus, and refraining from transmission if the bus is busy. This is similar to CSMA protocols for computer networks. The method may be implemented using standard digital gates. We discuss the bus traffic and briefly compare our solution to some existing solutions. We present some measured results from a MOSIS 2 μm chip

Keywords

VLSI; analogue integrated circuits; analogue processing circuits; asynchronous circuits; carrier sense multiple access; pulse frequency modulation; 1-persistent CSMA; 2 micron; CSMA protocol; MOSIS chip; asynchronous PFM analog VLSI systems; bus traffic sensing; bus-access method; communication architecture; interchip communication; pulse frequency modulation; standard digital gates; Encoding; Frequency modulation; Hardware; Informatics; Modulation coding; Protocols; Pulse modulation; Telecommunication traffic; Time division multiplexing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on

Conference_Location

Rodos

Print_ISBN

0-7803-3650-X

Type

conf

DOI

10.1109/ICECS.1996.582641

Filename

582641