Title :
Delay and DOA estimation for chip-asynchronous DS-CDMA systems using reduced rank space-time processing
Author :
Chuang, Chiao-Yao ; Yu, Xiaoli ; Kuo, C. C Jay
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
A reduced-rank space-time processing algorithm is proposed in this work to estimate the time-delay and the direction-of-arrival (DOA) in short-code chip-asynchronous DS-CDMA systems. Most algorithms proposed before demand the inversion of the received signal correlation matrix, which has a high computational cost. Here, we attempt to reduce the complexity by decomposing the correlation matrix inversion step into the cascade of multiple stages, where each stage outputs a scalar value that is obtained without an explicit matrix inversion operation. Furthermore, it is proved that the interference signals can be suppressed effectively using a small number of stages, and the performance is not much improved by applying more stages. Computer simulations are conducted to compare the performance of the reduced rank and the full rank approaches.
Keywords :
code division multiple access; correlation methods; delay estimation; direction-of-arrival estimation; interference suppression; matrix inversion; spread spectrum communication; synchronisation; DOA estimation; cascaded multiple inversion stages; delay estimation; direction-of-arrival estimation; interference suppression; received signal correlation matrix inversion; reduced rank space-time processing; short-code chip-asynchronous DS-CDMA systems; synchronization; Array signal processing; Delay estimation; Direction of arrival estimation; Fading; Filter bank; Interference suppression; Linear antenna arrays; Matrix decomposition; Maximum likelihood estimation; Multiaccess communication;
Conference_Titel :
Wireless Communications and Networking Conference, 2005 IEEE
Print_ISBN :
0-7803-8966-2
DOI :
10.1109/WCNC.2005.1424509