Title :
An asynchronous architecture model for behavioral synthesis
Author :
Cortadella, Jordi ; Badia, Rosa M.
Author_Institution :
Dept. of Comput. Archit., Polytech. Univ. of Catalonia, Barcelona, Spain
Abstract :
An asynchronous architecture model for behavioral synthesis is presented. The basis of the model lies in a distributed control structure consisting of multiple communicating processes. Data processing is performed by self-timed modules. Signal transition graphs (STGs) are used to specify the behavior of the control processes. By using existing synthesis procedures for STGs, circuits based on the presented architecture model are proved to be realizable and hazard-free
Keywords :
asynchronous sequential logic; computer architecture; directed graphs; distributed control; logic CAD; asynchronous architecture model; behavioral synthesis; data processing; distributed control structure; hazard free circuits; multiple communicating processes; self-timed modules; signal transition graphs; Adders; Automatic control; Circuit synthesis; Computer architecture; Control system synthesis; Delay; Distributed control; Process control; Service oriented architecture; Signal synthesis;
Conference_Titel :
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location :
Brussels
Print_ISBN :
0-8186-2645-3
DOI :
10.1109/EDAC.1992.205944
