Title :
Multiple-bus multiprocessor systems
Author :
Pease, Daniel J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA
Abstract :
A multiple-bus multiprocessor system (MMS) is a tightly coupled architecture that utilizes several parallel buses to interconnect multiple processors, shared memory, and shared I/O. An analysis of an MMS is presented, showing that it can provide significant processing power with a small number of buses compared to the number of processors. Results are given for the processing power in an MMS with exponentially distributed memory cycle and service times. These distributions are believed to be an excellent representation of many engineering and scientific applications.<>
Keywords :
multiprocessing systems; exponentially distributed memory cycle; multiple-bus multiprocessor system; shared I/O; shared memory; tightly coupled architecture; Bandwidth; Computer architecture; Costs; Degradation; Microprocessors; Multiprocessing systems; Multiprocessor interconnection networks; Petri nets; Power engineering and energy; System performance;
Conference_Titel :
System Sciences, 1988. Vol.I. Architecture Track, Proceedings of the Twenty-First Annual Hawaii International Conference on
Conference_Location :
Kailua-Kona, HI, USA
Print_ISBN :
0-8186-0841-2
DOI :
10.1109/HICSS.1988.11743
