DocumentCode :
3106835
Title :
GRTL-a graphical platform for pipelined system design
Author :
Jennings, Glenn
Author_Institution :
Dept. of Comput. Eng., Lund Univ., Sweden
fYear :
1991
fDate :
25-28 Feb 1991
Firstpage :
424
Lastpage :
428
Abstract :
Presents GRTL, a graphical design tool specifically for manual design of synchronous pipelines at the register transfer level. Abstractions (parameterized behavioral components, abstract signals) and AI methodology simplify input and reduce detail, yet useful timing analyses can be obtained. Features include integrated interactive design blackboard, Werner diagram and clocking formalisms for design correctness, open library, reversible functional simulator, and down-loading facility for external silicon compilation. Earlier work is contrasted
Keywords :
VLSI; circuit layout CAD; computer graphics; pipeline processing; AI methodology; GRTL; Werner diagram; abstract signals; clocking formalisms; design correctness; down-loading facility; external silicon compilation; graphical design tool; graphical platform; integrated interactive design blackboard; open library; parameterized behavioral components; pipelined system design; register transfer level; reversible functional simulator; synchronous pipelines; timing analyses; Artificial intelligence; Clocks; Design engineering; Electronic mail; Pipelines; Routing; Signal analysis; Silicon; Timing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation. EDAC., Proceedings of the European Conference on
Conference_Location :
Amsterdam
Type :
conf
DOI :
10.1109/EDAC.1991.206439
Filename :
206439
Link To Document :
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