Title :
Reduced DC-link voltage for six-leg DSTATCOM using IcosФ control algorithm
Author :
Bangarraju, J. ; Rajagopal, V. ; Jayalaxmi, A.
Author_Institution :
Electr. & Electron. Eng. Dept., Padmasri Dr B V Raju Inst. of Technol., Medak, India
Abstract :
The six-leg DSTATCOM is used for suppression of harmonics and regulation of terminal voltage. The proposed algorithm is based on IcosΦ control algorithm for DSTATCOM which uses unit templates instead of phased locked loop (PLL) to generate cosθ and sinθ to reduce the execution time. The six-leg IGBT based VSC when compared with three-leg IGBT uses unipolar switching, which will double the PWM switching frequency. The advantage of increasing the PWM switching frequency reduces the filter requirement and improves performance. The star/three single phase transformer reduces the dc-link voltage and compensates the neutral current. This paper deals with six-leg DSTATCOM using IcosΦ control algorithm using star/three single-phase transformer. The simulation results demonstrate effectiveness of DSTATCOM with linear and non-linear loads on MATLAB/SIMULINK environment.
Keywords :
harmonics suppression; insulated gate bipolar transistors; neutral currents; power transformers; power transistors; pulse width modulation; static VAr compensators; IcosΦ control algorithm; PWM switching frequency; dc-link voltage; filter; harmonics suppression; insulated gate bipolar transistor; neutral current compensation; six-leg DSTATCOM; six-leg IGBT based VSC; star-three single phase transformer; three-leg IGBT; unipolar switching; Harmonic analysis; Phase transformers; Power conversion; Power factor correction; Power harmonic filters; Voltage control; DSTATCOM; IcosФ algorithm; Power quality; insulated gate bipolar transistor; star/three single-phase transformer; voltage source converter;
Conference_Titel :
India Conference (INDICON), 2013 Annual IEEE
Conference_Location :
Mumbai
Print_ISBN :
978-1-4799-2274-1
DOI :
10.1109/INDCON.2013.6725949