DocumentCode
310954
Title
An algorithm based on the Hungarian method for register reduction during complex functional unit allocation
Author
Lin, Ta-Cheng ; Cyre, Walling R.
Author_Institution
Bradley Dept. of Electr. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
fYear
1997
fDate
12-14 Apr 1997
Firstpage
43
Lastpage
47
Abstract
The trends of high-level synthesis are moving from using elementary operations to more complicated operations. These complex operations are implemented by using complicated functional units. Most complex components only have single data I/O ports (buses) so that memory devices, such as stacks, are inside the components to hold the input operands and results for execution. Traditional register allocation algorithms can not be applied directly because the internal memory devices can used to hold the intermediate values. An algorithm which is based on the Hungarian Method has been developed to minimize the use of registers when complex functional units are used
Keywords
computer architecture; high level synthesis; resource allocation; Hungarian method; functional unit allocation; high-level synthesis; register allocation; register reduction; Flow graphs; Hardware design languages; Heuristic algorithms; High level synthesis; Libraries; NP-complete problem; Partitioning algorithms; Registers; Scheduling algorithm; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Southeastcon '97. Engineering new New Century., Proceedings. IEEE
Conference_Location
Blacksburg, VA
Print_ISBN
0-7803-3844-8
Type
conf
DOI
10.1109/SECON.1997.598606
Filename
598606
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