Title :
Differential Input Differential Output Low Power High Gain LNA for 2.4 GHz Applications Using TSMC 180nm CMOS RF Process
Author :
Patil, Santosh B. ; Kanphade, Rajendra D.
Author_Institution :
VLSI & ESD Center, S.S.G.M. Coll. of Eng., Shegaon, India
Abstract :
Differential input differential output low noise amplifier working at 2.4GHz is designed using TSMC 180nm CMOS RF process. Design methodology of LNA is analyzed in detail. Cascode topology with inductively degenerated common-source CMOS LNA is suggested with improved gain, linearity, stability and improved isolation. The optimum matching network is designed to minimize the noise figure (NF) and maximize the power gain. Layout is presented. Pre layout and Post layout results are validated using Cadence Virtuoso IC 613. The proposed LNA exhibits a linear power gain of 14.55 dB, noise figure of 1.209 dB, i nput return loss (S11) of -14.15dB, Output return loss (S22) of -10.6dB and Isolation (S12) of -19.46dB and consume 3mA current at 1.8V supply voltage. Layout size is 0.261mm × 0.202mm.
Keywords :
CMOS integrated circuits; radio networks; CMOS RF process; Cadence Virtuoso IC 613; NF; TSMC; cascode topology; degenerated common source CMOS LNA; differential input differential output low power high gain LNA; frequency 2.4 GHz; noise amplifier; noise figure; optimum matching network; power gain; size 180 nm; wireless communication modules; Gain; Layout; Linearity; Noise; Noise figure; Radio frequency; Transistors; Cascode topology; Inductively degenerated CMOS LNA; Noise figure; Pre layout and Post layout simulations; S-parameters;
Conference_Titel :
Computing Communication Control and Automation (ICCUBEA), 2015 International Conference on
Conference_Location :
Pune
DOI :
10.1109/ICCUBEA.2015.181