Title :
A statistical model for fault coverage analysis
Author :
Chen, Chung Ho ; Soong, N.L.
Author_Institution :
Dept. of Electr. Eng., Pennsylvania State Univ., University Park, PA, USA
Abstract :
The authors present a statistical model for the evaluation of test coverage for both single-stuck-at and multiple-stuck-at faults. The model parameters are the node fault complexity and test frequency. For multiple fault detection, the model is applied to calculate the defect level of a production test.<>
Keywords :
computational complexity; fault location; integrated circuit testing; logic testing; production testing; statistical analysis; fault coverage analysis; model parameters; multiple fault detection; multiple-stuck-at faults; node fault complexity; production test; single stuck-at fault; statistical model; test coverage; test frequency; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Costs; Electrical fault detection; Fault detection; Hardware; Production; Semiconductor device measurement;
Conference_Titel :
VLSI Test Symposium, 1991. 'Chip-to-System Test Concerns for the 90's', Digest of Papers
Conference_Location :
Atlantic City, NJ, USA
DOI :
10.1109/VTEST.1991.208163
