Title :
A study on thermal analysis for 3D heterogenous embedded system integration platform MorPACK
Author :
Chue, Jin-Ju ; Yang, Chih-Chyau ; Chen, Shih-Lun ; Chiu, Chun-Chieh ; Liu, Yi-Jun ; Chu, Chun-Chieh ; Wu, Chien-Ming ; Huang, Chun-Ming
Author_Institution :
Nat. Chip Implementation Center (CIC), Hsinchu, Taiwan
Abstract :
This paper presents a thermal analysis result for a 3D heterogeneous embedded system integration MorPACK (morphing package) platform. The MorPACK platform is stacked by heterogeneous submodules composed of bare dies, a substrate, connection bridges, and solder balls. Since the tiny, heterogeneous and integrable characteristics of MorPACK platform, it needs to be fabricated in high-density and laminar structure. The cooling ability of forced convection is restricted. This study presents an important characteristic for this 3D structure and two indications to optimize thermal solution for MorPACK structure. The characteristic shows the lowest layer owns the best cooling condition, so the bare die chip with highest power consumption should be placed on the lowest layer. It achieves cooling a 0.45-W consuming chip by 12-degree more than it put on the top layer. One of the indications shows the vertical thermal conductivity can be improved by filling up whole MorPACK with mold material. This skill efficiently cools down the 0.45-W consuming chip by 10-degree more than non-filled-up structure. The other indication shows removing the connection bridges and cutting out the substrate to make a room space for chip placement. With result shown, 50 % height and volume of MorPACK can be minimized and also reduce thermal resistance in out-plan direction.
Keywords :
cooling; embedded systems; integrated circuit packaging; system-on-chip; thermal analysis; thermal conductivity; thermal resistance; 3D heterogenous embedded system integration platform MorPACK; chip placement; cooling; morphing package platform; power 0.45 W; power consumption; room space; solder balls; thermal analysis; thermal resistance reduction; vertical thermal conductivity; Discrete cosine transforms; Materials; Niobium; Numerical models; Solid modeling; System-on-a-chip; Three dimensional displays;
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2011 12th International Conference on
Conference_Location :
Linz
Print_ISBN :
978-1-4577-0107-8
DOI :
10.1109/ESIME.2011.5765819