Title :
A 2ns Cycle, 4ns Access 512kb CMOS ECL SRAM
Author :
Chappell, T.I. ; Chappell, B.A. ; Schuster, S.E. ; Allan, J.W. ; Kepner, S.P. ; Joshi, Rajiv V. ; French, R.L.
Author_Institution :
IBM T. J. Watson Research Center
Keywords :
CMOS technology; Circuit stability; Decoding; Error analysis; Pipeline processing; Pulse amplifiers; Pulse circuits; Random access memory; Space vector pulse width modulation; Switches;
Conference_Titel :
Solid-State Circuits Conference, 1991. Digest of Technical Papers. 38th ISSCC., 1991 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-87942-644-6
DOI :
10.1109/ISSCC.1991.689059
