• DocumentCode
    3118604
  • Title

    Challenges of RF and mixed signal design under process variability

  • Author

    Panagopoulos, Georgios ; Riess, Phillipp ; Baumgartner, Philip

  • Author_Institution
    Intel Corp., Munich, Germany
  • fYear
    2013
  • fDate
    8-10 July 2013
  • Firstpage
    251
  • Lastpage
    251
  • Abstract
    Summary form only given. The continuous device shrinking, towards nano-scaled technology nodes, has been resulted in yield and reliability challenges due to technology process variations for active FEOL devices and passives in the BEOL. These effects have been modelled extensively in terms of global and local variations. However, a lot of challenges remain to capture the medium range mismatch of these devices. This presentation will give some examples of RF and mixed signal circuits such as LNAs, PAs and VCOs where their performance is degraded due to this additional variability.
  • Keywords
    integrated circuit design; low noise amplifiers; mixed analogue-digital integrated circuits; nanotechnology; power amplifiers; radiofrequency integrated circuits; voltage-controlled oscillators; BEOL; LNA; PA; RF signal circuits; VCO; active FEOL devices; continuous device shrinking; global variations; local variations; mixed signal circuits; nanoscaled technology nodes; passive devices; process variability; technology process variations; Integrated circuit modeling; Nanoscale devices; Performance evaluation; Radio frequency; Reliability engineering; Signal design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium (IOLTS), 2013 IEEE 19th International
  • Conference_Location
    Chania
  • Type

    conf

  • DOI
    10.1109/IOLTS.2013.6604095
  • Filename
    6604095