DocumentCode :
3120295
Title :
SPAID: an architectural synthesis tool for DSP custom applications
Author :
Haroun, B.S. ; Elmasry, M.I.
Author_Institution :
Dept. of Electr. Eng., Waterloo Univ., Ont., Canada
fYear :
1988
fDate :
16-19 May 1988
Abstract :
SPAID is a design tool that maps digital-signal-processing (DSP) algorithms into multibus VLSI architectures. Explicit algorithm and VLSI performance constraints on throughput, latency, silicon area and power dissipation are obeyed. SPAID synthesizes a multibus multioperator (MBMO) data path with the minimum number of buses, operators and registers that satisfies the performance constaints. Design examples show that SPAID´s performance compare favorably with existing synthesis systems for high-throughput distributed architectures
Keywords :
VLSI; circuit CAD; circuit layout CAD; microprocessor chips; DSP custom applications; SPAID; VLSI performance constraints; architectural synthesis tool; chip area; design tool; digital-signal-processing; high-throughput distributed architectures; latency; minimum number of buses; minimum operators; minimum registers; multibus VLSI architectures; multibus multioperator data path; power dissipation; silicon area; throughput; Algorithm design and analysis; Clocks; Delay estimation; Digital signal processing; Flow graphs; Particle separators; Power dissipation; Propagation delay; Throughput; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988
Conference_Location :
Rochester, NY
Type :
conf
DOI :
10.1109/CICC.1988.20866
Filename :
20866
Link To Document :
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