DocumentCode :
3121506
Title :
Circuit design for 128Mb PCRAM based on 40nm technology
Author :
Cai, Daolin ; Chen, Houpeng ; Li, Xi ; Wang, Qian ; Song, Zhitang
Author_Institution :
State Key Lab. of Functional Mater. for Inf., Shanghai Inst. of Microsyst. & Inf. Technol., Shanghai, China
fYear :
2011
fDate :
7-9 Nov. 2011
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, a 128Mb phase change random access memory based on phase change Ge2Sb2Te5 alloy has been designed in 40nm 4 metal level CMOS technology. Memory cell is the dual trench epitaxial pn junction diode. According to the feature of the 1D1R memory cell structure, array architecture and chip architecture have been optimized. The read access time is 30ns in simulation. The layout area is 6.6mm × 3.8mm.
Keywords :
CMOS integrated circuits; antimony alloys; germanium alloys; integrated circuit design; p-n junctions; phase change memories; tellurium alloys; 1D1R memory cell structure; CMOS technology; Ge2Sb2Te5; PCRAM; circuit design; dual trench epitaxial pn junction diode; memory size 128 MByte; phase change random access memory; read access time; size 3.8 mm; size 40 nm; size 6.6 mm; Arrays; Layout; Materials; Metals; Microprocessors; Phase change random access memory; 1D1R; Ge2Sb2Te5 alloy; PCRAM; circuit design; diode;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Non-Volatile Memory Technology Symposium (NVMTS), 2011 11th Annual
Conference_Location :
Shanghai
Print_ISBN :
978-1-4577-1428-3
Type :
conf
DOI :
10.1109/NVMTS.2011.6137087
Filename :
6137087
Link To Document :
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