Title :
Evolution of VLSI reliability engineering
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
Projection indicates that by the turn of the century microcomputer chips will have 100 million transistors and failure rates of less than 10 FIT. Traditional accelerated product life tests and wafer-level reliability measurement techniques presently being developed will have severe limitations in resolving the 10 FIT failure rate of complex VLSI circuits. These limitations are discussed, along with the change in direction that the reliability engineering and manufacturing community will have to take over the next decade to meet the challenge of continuously decreasing failure rate goals.<>
Keywords :
VLSI; circuit reliability; failure analysis; life testing; VLSI reliability engineering; accelerated product life tests; complex VLSI circuits; failure rate goals; failure rates; manufacturing community; microcomputer chips; reliability engineering; transistors; wafer-level reliability measurement techniques; Circuit testing; Life estimation; Life testing; Manufacturing; Measurement techniques; Microcomputers; Physics; Random access memory; Reliability engineering; Very large scale integration;
Conference_Titel :
Reliability Physics Symposium, 1990. 28th Annual Proceedings., International
Conference_Location :
New Orleans, LA, USA
DOI :
10.1109/RELPHY.1990.66052