DocumentCode :
3129172
Title :
A Reconfigurable Architecture for Stereo-Assisted Detection of Point-Features for Robot Mapping
Author :
Kalomiros, John ; Lygouras, John
Author_Institution :
Dept. of Inf. & Commun., Technol. Educ. Inst. of Serres, Serres, Greece
fYear :
2009
fDate :
9-11 Dec. 2009
Firstpage :
404
Lastpage :
409
Abstract :
A hardware-friendly procedure is presented for the extraction of point-features from stereo image pairs for the purpose of real-time robot motion estimation and 3-D environmental mapping. The procedure is implemented in reconfigurable hardware and is developed as a set of custom HDL library components ready for integration in a system-on-a-programmable-chip. The main hardware stages are a stereo accelerator, a left and right image corner detector and a stage performing left-right consistency check. For the stereo-processor stage we have implemented and tested a SAD-based component for local area-matching and a global-matching component based on a Maximum-Likelihood dynamic programming technique. The system includes a Nios II processor for data control and a USB 2.0 interface for host communication. Resource usage and 3D-mapping results are reported for different versions of the reconfigurable system.
Keywords :
dynamic programming; feature extraction; maximum likelihood estimation; motion estimation; programmable circuits; reconfigurable architectures; robot vision; stereo image processing; 3D environmental mapping; HDL library components; global matching component; left-right consistency check; local area matching; maximum-likelihood dynamic programming; point-features; real-time robot motion estimation; reconfigurable architecture; reconfigurable hardware; robot mapping; stereo image pairs; stereo-assisted detection; system-on-a-programmable-chip; Detectors; Dynamic programming; Hardware design languages; Libraries; Maximum likelihood detection; Maximum likelihood estimation; Motion estimation; Reconfigurable architectures; Robot motion; Testing; Machine vision; Real-Time systems; Reconfigurable hardware; Robot mapping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reconfigurable Computing and FPGAs, 2009. ReConFig '09. International Conference on
Conference_Location :
Quintana Roo
Print_ISBN :
978-1-4244-5293-4
Electronic_ISBN :
978-0-7695-3917-1
Type :
conf
DOI :
10.1109/ReConFig.2009.41
Filename :
5382102
Link To Document :
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