Interlayer dielectric (ILD)-related edge channel effect in high density DRAM cell

Author

Il-Gweon Kim ; Nam-Sung Kim ; Se-Kyeong Choi ; Tae-Un Youn ; Hyuck-Chai Jung ; Jae-Soon Kweon ; Young-I Chun ; Wan-Soo Kim ; Myung-Jong Bong ; Joo-Seog Park

Author_Institution

Memory R&D Div., Hynix Semi., Chungbuk, South Korea

fYear

2002

fDate

8-11 Dec. 2002

Firstpage

827

Lastpage

830

Abstract

A DRAM cell for suppressing anomalous threshold voltage (VT) lowering due to ILD-related edge channel effect is intensively investigated. Our work verifies that the anomalous edge channel effect in a 0.15 /spl mu/m-DRAM cell is mainly attributed to positive charge in the Si/SiO/sub 2/ interface originating from ILD-contained hydrogen and moisture. In addition, on the basis of the hydronium-like model, five process schemes to overcome the anomalous edge channel effect, are independently suggested: (1) outgassing prior to stopper Si/sub 3/N/sub 4/, (2) cutting off migration path (3) using high temperature oxide (HTO) as gate inner sidewall (SW) spacer, (4) Si-rich high density plasma (HDP) process and (5) incorporating the appropriate quantity of fluorine during the ILD HDP process.

Keywords

CMOS memory circuits; DRAM chips; annealing; dielectric thin films; fluorine; hydrogen; integrated circuit technology; moisture; outgassing; plasma materials processing; semiconductor-insulator boundaries; 0.15 micron; F; F incorporation; H; HTO gate inner sidewall spacer; ILD-contained H; ILD-contained moisture; ILD-related edge channel effect; Si-SiO/sub 2/; Si-rich high density plasma process; Si/SiO/sub 2/ interface; Si/sub 3/N/sub 4/; anomalous edge channel effect; anomalous threshold voltage lowering suppression; high density DRAM cell; high temperature oxide; hydronium-like model; interlayer dielectric; migration park cutoff; outgassing; positive charge; stopper Si/sub 3/N/sub 4/; Annealing; Dielectrics; Etching; Hydrogen; Plasma applications; Plasma density; Plasma temperature; Random access memory; Research and development; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2002. IEDM '02. International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-7462-2

Type

conf

DOI

10.1109/IEDM.2002.1175965

Filename

1175965