DocumentCode :
3132622
Title :
UltraScan: using time-division demultiplexing/multiplexing (TDDM/TDM) with VirtualScan for test cost reduction
Author :
Wang, Laung-Terng L T ; Abdel-Hafez, Khader S. ; Wen, Xiaoqing ; Sheu, Boryau ; Wu, Shianling ; Lin, Shyh-Horng ; Chang, Ming-Tung
Author_Institution :
SynTest Technol. Inc., Sunnyvale, CA
fYear :
2005
fDate :
8-8 Nov. 2005
Lastpage :
953
Abstract :
This paper describes time-division demultiplexing and multiplexing of high-data-rate scan patterns applied on I/O´s into low-data-rate scan patterns applied on VirtualScan compression circuitry to further reduce test application time and test pin-count without coverage loss
Keywords :
automatic test pattern generation; demultiplexing; integrated circuit testing; time division multiplexing; virtual instrumentation; UltraScan system; VirtualScan compression circuitry; high-data-rate scan patterns; low-data-rate scan patterns; test application time reduction; test cost reduction; test pin-count reduction; time division multiplexing; time-division demultiplexing; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Costs; Demultiplexing; Electronic equipment testing; Integrated circuit testing; Test pattern generators; Time division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2005. Proceedings. ITC 2005. IEEE International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-9038-5
Type :
conf
DOI :
10.1109/TEST.2005.1584060
Filename :
1584060
Link To Document :
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