RELIANT: a reliability analysis tool for VLSI interconnects

Author

Frost, David F. ; Poole, Kelvin F. ; Haeussler, David A.

Author_Institution

Clemson Univ., SC, USA

fYear

1988

fDate

16-19 May 1988

Abstract

RELIANT is a CAD (computer-aided design) tool which predicts the failure rate of integrated circuit conductors. Circuit layout, device models, and electromigration process data are inputs to RELIANT. The interconnect patterns in a Caltech Intermediate Format (CIF) file are fractured into a number of characteristic segment types. An equivalent circuit is extracted and SPICE is used to determine the transient currents in each segment. Using parametric models for electromigration damage, the failure rate of the system is computed. RELIANT provides designers with feedback on the reliability hazards of a design. Results show the application of the tool to a standard-cell CMOS component. For modeling large VLSI interconnect systems, the incorporation of a switch-level simulator is discussed

Keywords

CMOS integrated circuits; VLSI; circuit CAD; circuit reliability; failure analysis; CAD; Caltech Intermediate Format; RELIANT; SPICE; VLSI interconnects; characteristic segment types; device models; electromigration process; equivalent circuit; failure rate; parametric models; reliability analysis tool; standard-cell CMOS component; switch-level simulator; transient currents; Conductors; Data mining; Design automation; Electromigration; Equivalent circuits; Integrated circuit interconnections; Integrated circuit reliability; Parametric statistics; SPICE; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1988., Proceedings of the IEEE 1988

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/CICC.1988.20949

Filename

20949