• DocumentCode
    3133406
  • Title

    Test compression - real issues and matching solutions

  • Author

    Rajski, Janusz

  • Author_Institution
    Mentor Graphics Corp., Wilsonville, OR
  • fYear
    2005
  • fDate
    8-8 Nov. 2005
  • Lastpage
    1291
  • Abstract
    Even though embedded test compression was commercially introduced only four years ago, it has already been broadly adopted as a mainstream DFT methodology. This article discusses the basic criteria for test compression, its strengths and weakness. It also provides the characteristics of EDT (embedded deterministic test) technology
  • Keywords
    design for testability; embedded systems; integrated circuit testing; semiconductor device testing; DFT methodology; EDT technology; embedded test compression; Automatic test pattern generation; Costs; Degradation; Design for testability; Fault detection; Fault diagnosis; Graphics; Logic design; Logic testing; Test equipment;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2005. Proceedings. ITC 2005. IEEE International
  • Conference_Location
    Austin, TX
  • Print_ISBN
    0-7803-9038-5
  • Type

    conf

  • DOI
    10.1109/TEST.2005.1584114
  • Filename
    1584114
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3133406