Monte Carlo simulation of electromigration in polycrystalline metal stripes

Author

Pascoli, S. Di ; Iannaccone, G.

Author_Institution

Dipt. di Ingegneria dell´´Inf., Pisa Univ., Italy

fYear

1999

fDate

1999

Firstpage

55

Lastpage

59

Abstract

We have developed a Monte Carlo simulator of the electromigration process in polycrystalline metal stripes. Stripes with different average grain size can be generated with Voronoi tasselation, and mapped on to a network of resistors. The proposed model includes the major role played by grain boundaries and by the current density redistribution within the stripe following void formation. Simulations of stripes with different grain sizes and different widths are shown, and a few expressions for the failure probability are compared on the basis of their capability of reproducing the experimental results. In addition, electromigration noise has been computed, recovering the characteristic 1/f^γ(γ≈2) behavior. The substantial qualitative agreement between our calculations and the experimental results is a convincing test of the capability of the model proposed to include the relevant physics

Keywords

1/f noise; Monte Carlo methods; computational geometry; current density; electromigration; failure analysis; grain boundaries; grain size; integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; integrated circuit noise; integrated circuit reliability; probability; Monte Carlo simulation; Monte Carlo simulator; Voronoi tasselation; average grain size; characteristic 1/f noise behavior; current density redistribution; electromigration; electromigration noise; electromigration process; failure probability; grain boundaries; grain size; line width; model; polycrystalline metal stripes; resistor network mapping; stripe simulations; void formation; Circuits; Computational modeling; Current density; Electromigration; Grain boundaries; Grain size; Joining processes; Monte Carlo methods; Resistors; Telecommunications;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the

Print_ISBN

0-7803-5187-8

Type

conf

DOI

10.1109/IPFA.1999.791304

Filename

791304