DocumentCode :
3136219
Title :
Invited tutorial: Advanced CMOS transistor technology: Past, present and future
Author :
Datta, Suman
Author_Institution :
Pennsylvania State Univ., University Park, PA, USA
fYear :
2011
fDate :
22-22 April 2011
Firstpage :
1
Lastpage :
1
Abstract :
Almost half a century later, Gordon Moore´s accurate observation that the number of transistors in an integrated circuit doubles every two years continues to be the guiding principle of the semiconductor industry. We have almost taken for granted the apparent corollary; as transistor count increases, each transistor becomes smaller, faster and cheaper. Today, the transistor physical gate length in production is less than 30 nanometer; further brute-force geometric scaling of conventional silicon devices limit faces many fundamental challenges - rising energy consumption, power density and worsening device to device fluctuation being some of the foremost barriers. In this tutorial, I will present the amazing journey of the logic transistor in the last ten years starting with strained channel CMOS transistors, the high-k/metal-gate silicon CMOS transistors and the multiple-gate transistor architecture. Then, I will review the recent breakthroughs in non-silicon (compound semiconductor and germanium) based quantum-well transistor research that are promising transistor architecture for the next decade. I will also describe our research efforts in a new genre of “green” transistors that work on the quantum-mechanical band to band tunneling principle called Tunnel transistors and can operate with the record low energy delay product. Finally, interaction of emerging devices with the circuit and system architecture will also be discussed. This talk will summarize the twenty-first century logic transistor innovations that have and will continue to enhance the energy efficiency and performance of information processing systems through materials, device physics and architectural innovations.
Keywords :
CMOS logic circuits; MOSFET; elemental semiconductors; energy conservation; energy consumption; high-k dielectric thin films; low-power electronics; quantum well devices; semiconductor industry; silicon; tunnel transistors; tunnelling; CMOS integrated circuit; Si; advanced CMOS transistor technology; band tunneling principle; brute-force geometric scaling; device fluctuation; energy consumption; energy efficiency; green transistor; high-k metal-gate silicon CMOS transistor; logic transistor; low energy delay product; multiple-gate transistor architecture; nonsilicon based quantum-well transistor; power density; quantum mechanical band; semiconductor industry; silicon device; strained channel CMOS transistor; transistor gate length; tunnel transistor; CMOS integrated circuits; CMOS technology; Computer architecture; High K dielectric materials; Logic gates; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Electron Devices (WMED), 2011 IEEE Workshop on
Conference_Location :
Boise, ID
ISSN :
1947-3834
Print_ISBN :
978-1-4244-9740-9
Type :
conf
DOI :
10.1109/WMED.2011.5767289
Filename :
5767289
Link To Document :
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