Ultra-low Spike Rate Silicon Neuron

Author

Wong, Yanyi L. ; Xu, Peng ; Abshire, Pamela

Author_Institution

Univ. of Maryland, College Park

fYear

2007

fDate

27-30 Nov. 2007

Firstpage

95

Lastpage

98

Abstract

We present theory, design and simulation results for a silicon neuron circuit that achieves extremely low spike rates and small footprint by exploiting the low current characteristics in floating gate structures. As in biological counterparts, the spike rate is compressed against stimulant current. Simulations confirm sub-Hertz spike rates in steady state with a stimulant current of 7pA and below, and up to 100x spike rate reduction at InA. With reasonable device variation modelling, Monte Carlo simulation shows that spike rate varies by a standard deviation of 25%.

Keywords

Monte Carlo methods; biocybernetics; neural nets; Monte Carlo simulation; Si; floating gate structure; silicon neuron circuit design; silicon neuron circuit simulation; silicon neuron circuit theory; stimulant current; ultralow spike rate silicon neuron; Biological information theory; Biological system modeling; Biology computing; Capacitors; Circuit simulation; Frequency; MOSFETs; Neurons; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Biomedical Circuits and Systems Conference, 2007. BIOCAS 2007. IEEE

Conference_Location

Montreal, Que.

Print_ISBN

978-1-4244-1524-3

Electronic_ISBN

978-1-4244-1525-0

Type

conf

DOI

10.1109/BIOCAS.2007.4463317

Filename

4463317