• DocumentCode
    3139616
  • Title

    G2L: system for converting low-level geometrical designs to a higher level representation

  • Author

    Pajarre, Eero ; Ritoniemi, Tupuni ; Tenhunen, Hunnu

  • Author_Institution
    Signal Process. Lab., Tampere Univ. of Technol., Finland
  • fYear
    1991
  • fDate
    27-31 May 1991
  • Firstpage
    366
  • Lastpage
    371
  • Abstract
    The author presents a methodology for converting VLSI design information from a geometry oriented database to a higher level database where electrical objects are the primitive elements. The conversion extracts the active elements and implicit connections from the geometry and recreates them using novel routing techniques producing geometrically identical layout. The methodology has been implemented in a GDS II to L language converter capable of converting databases containing whole chip designs. The system has been tested with processor designs and whole standard cell libraries.<>
  • Keywords
    VLSI; circuit layout CAD; integrated circuit technology; network routing; G2L; GDS II to L language converter; VLSI design; chip designs; design information conversion; geometrically identical layout; geometry oriented database; higher level representation; low-level geometrical designs; processor designs; routing techniques; standard cell libraries; Chip scale packaging; Data mining; Information geometry; Libraries; Object oriented databases; Process design; Routing; Spatial databases; System testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Euro ASIC '91
  • Conference_Location
    Paris, France
  • Print_ISBN
    0-8186-2185-0
  • Type

    conf

  • DOI
    10.1109/EUASIC.1991.212835
  • Filename
    212835