DocumentCode :
3140934
Title :
Functional Level Simulation in FANSIM3 - Algorithms, Data Structures and Results
Author :
Hirschhorn, S.S. ; Hommel, M.B. ; Bures, C.
Author_Institution :
GTE Laboratories Incorporated, Waltham, MA
fYear :
1981
fDate :
29-1 June 1981
Firstpage :
248
Lastpage :
255
Abstract :
This paper discusses the functional level logic simulation techniques used in the FANSIM3 simulator. The data structures for function evaluation and the algorithms used to simulate functional models are presented. The methods used to simulate datapaths and bussed signals are also discussed. Specific results, based on a year´s experience with the simulator, are presented.
Keywords :
Circuit faults; Circuit simulation; Circuit testing; Data structures; Databases; Delay; Discrete event simulation; Logic devices; Logic testing; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1981. 18th Conference on
Type :
conf
DOI :
10.1109/DAC.1981.1585359
Filename :
1585359
Link To Document :
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