A Hardware Assisted Design Rule Check Architecture

This paper describes an architecture for design rule checking that uses a small amount of special purpose hardware to achieve a significant speed improvement over conventional methods. A fixed grid raster scan algorithm is used that allows checking of 45 ° angled edges at a modest cost in performance. Operations implemented directly in hardware include width checks, edge condition checks, boolean operations on masks, and shrinking and expansion of masks. Hardware support for rasterization is also provided. Software in a controlling processor handles all geometric data manipulation. This architecture should be able to check a simple set of design rules on a 300 mil square layout in one and one half minutes, if the controlling processor can provide data quickly enough. Layouts have been completed for two of four custom chips used in this architecture, and one has been fabricated and proven functional.