• DocumentCode
    3144897
  • Title

    A Combined Force and Cut Algorithm for Hierarchical VLSI Layout

  • Author

    Wipfler, G.J. ; Wiesel, M. ; Mlynski, D.A.

  • Author_Institution
    Institut fur theoretische Elektrotechnik, Universitat Karlsruhe, Germany
  • fYear
    1982
  • fDate
    14-16 June 1982
  • Firstpage
    671
  • Lastpage
    677
  • Abstract
    This paper presents a new algorithm for the initial placement of hierarchical VLSI circuits. The components to be placed are orthogonal macrocells of variable shape and size. This algorithm combines the advantages of force directed placement and min-cut algorithm. It provides an initial placement which avoids overlapping between cells and includes an estimation of routing area. This algorithm is suitable for regular cell arrangements, too.
  • Keywords
    Circuit topology; Design automation; Differential equations; Integrated circuit interconnections; Macrocell networks; Parallel processing; Partitioning algorithms; Shape; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1982. 19th Conference on
  • Conference_Location
    Las Vegas, NV, USA
  • ISSN
    0146-7123
  • Print_ISBN
    0-89791-020-6
  • Type

    conf

  • DOI
    10.1109/DAC.1982.1585568
  • Filename
    1585568
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3144897