Design of a radiation tolerant library on micronic CMOS technology

The construction of a radiation tolerant library can be reached by improving technology and by optimizing the design of less tolerant cells against total dose, transient effects due to heavy ions or gamma radiation. A first step consists in characterizing basic operators of the library by simulating noise margin, propagation delays and current consumption. Correlations between simulations and measurement are realized on irradiated test vehicles. In a second step, sensitive cells are modified to guarantee the desired immunity. This methodology, first applied on 2 μm CMOS technology, is now used on MHS 1 μm technology for ASIC design methodologies: gate-arrays and silicon compilation. This paper describes the work in designing and modeling which leads to the availability of two specialized offerings: a gate-array family with gate counts from 2000 to 50000 gates (MHS MC-RT family) and the silicon compiler tool GENESIL from MENTOR company