DocumentCode
315199
Title
Yield improvement for GaAs IC manufacturing using neural network inverse modeling
Author
Zurada, Jacek M. ; Lozowski, Andrzej ; Malinowski, Aleksander
Author_Institution
Dept. of Electr. Eng., Louisville Univ., KY, USA
Volume
2
fYear
1997
fDate
9-12 Jun 1997
Firstpage
800
Abstract
This paper describes a neural network based method of design centering for microelectronic circuits fabrication process. Process data are first evaluated for principal components and subsequently modeled using multilayer perceptron networks in a reduced and transformed input space. Perceptron network models are then inverted, and center settings of input variables are computed by using the inverse PCA transformation. The approach allows for maximizing the fabrication yield of GaAs circuits. Example of yield maximization for MMIC fabrication process is provided to demonstrate the effectiveness of the proposed technique
Keywords
Gaussian distribution; III-V semiconductors; MESFET integrated circuits; MMIC; VLSI; circuit optimisation; gallium arsenide; identification; integrated circuit yield; inverse problems; multilayer perceptrons; semiconductor process modelling; tolerance analysis; GaAs; III-V semiconductor; MMIC fabrication process; VLSI; design centering; gate-final stage yield; integrated circuit manufacturing; inverse PCA transformation; inverse projection; microelectronic circuits fabrication; multilayer perceptron networks; neural network inverse modeling; optimization algorithm; principal components; process data; reduced input space; transformed input space; yield improvement; yield maximization; yield probability; Circuits; Computer networks; Design methodology; Fabrication; Gallium arsenide; Input variables; Manufacturing; Microelectronics; Multilayer perceptrons; Neural networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks,1997., International Conference on
Conference_Location
Houston, TX
Print_ISBN
0-7803-4122-8
Type
conf
DOI
10.1109/ICNN.1997.616125
Filename
616125
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